46 lines
1.0 KiB
Plaintext
46 lines
1.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright (C) 2025 PHYTEC Messtechnik GmbH
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/imx8mp-clock.h>
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#include "imx8mp-phyboard-pollux-peb-av-10.dtsi"
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&backlight_lvds0 {
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brightness-levels = <0 8 16 32 64 128 255>;
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default-brightness-level = <8>;
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enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
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num-interpolated-steps = <2>;
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pwms = <&pwm4 0 66667 0>;
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status = "okay";
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};
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&lcdif2 {
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status = "okay";
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};
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&lvds_bridge {
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assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
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assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
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/*
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* The LVDS panel uses 66.5 MHz pixel clock, set IMX8MP_VIDEO_PLL1 to
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* 66.5 * 7 = 465.5 MHz so the LDB serializer and LCDIFv3 scanout
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* engine can reach accurate pixel clock of exactly 66.5 MHz.
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*/
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assigned-clock-rates = <0>, <465500000>;
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status = "okay";
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};
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&panel_lvds0 {
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compatible = "powertip,ph128800t006-zhc01";
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status = "okay";
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};
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&pwm4 {
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status = "okay";
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};
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