54 lines
1.1 KiB
Plaintext
54 lines
1.1 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2022-2026 Marek Vasut
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*/
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/dts-v1/;
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/plugin/;
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#include "imx8mp-dhcom-overlay-panel-lvds.dtsi"
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#include "imx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi"
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#include "imx8mp-pinfunc.h"
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&{/} {
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gpio-keys {
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button-1 {
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/* TA2 GPIO conflicts with Touchscreen RESET GPIO-B */
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status = "disabled";
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};
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button-2 {
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/* TA3 GPIO conflicts with Touchscreen IRQ GPIO-C */
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status = "disabled";
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};
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};
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led {
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led-2 {
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/* LED2 GPIO conflicts with BL-ON1 GPIO-G */
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status = "disabled";
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};
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};
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};
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&media_blk_ctrl {
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/*
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* The Chefree CH101OLHLWH-002 panel requires 71.1 MHz LVDS clock.
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* Set IMX8MP_VIDEO_PLL1 to 497.7 MHz , since 497.7 MHz / 7 = 71.1 MHz .
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*/
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assigned-clock-rates = <500000000>, <200000000>, <0>, <0>, <0>, <497700000>;
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};
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&pinctrl_dhcom_c {
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fsl,pins = <
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/* GPIO_C */
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MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02 0x40000000
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>;
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};
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&touch_lvds {
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pinctrl-0 = <&pinctrl_dhcom_b &pinctrl_dhcom_c>;
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pinctrl-names = "default";
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interrupt-parent = <&gpio5>;
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interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
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};
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